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Integrated Circuit Systems, Inc.
ICS9169A-70
Frequency Generator for Workstation Systems
General Description
The ICS9169A-70 is a low-cost frequency generator designed specifically for workstation or PC system clocks. The integrated buffer minimizes skew and provides all the clocks required. A 14.318 MHz XTAL oscillator provides the reference clock to generate standard Pentium frequencies. The CPU clock makes gradual frequency transitions without violating the PLL timing of internal microprocessor clock multipliers.
Features
* * * * * * * * * 9 PCI outputs selectable from 30 to 66.6MHz 3 SCSI outputs, selectable from 10 to 80MHz 500ps skew window for all synchronous clock edges Integrated buffer outputs drive up to 30pF loads 500ps output to output skew window Buffers drive 30pF loads nominally 0.8V/ns skew rate 3.0V - 3.7Vsupply range 32-pin SOIC package 48 MHz clock for USB support and 24 MHz clock for FD
Pin Configuration
Block Diagram
32-Pin SOIC
9169A-70 Rev B 2/14/01
ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.
ICS9169A-70
Pin Descriptions
PIN NUMBER 1 2 PIN NAME VDD1 X1 TYPE PWR IN DESCRIPTION Power for logic, PLL and output buffers. XTAL or external reference frequency input. This input includes XTAL load capacitance and feedback bias for a 12-16 MHz crystal, nominally 14.31818 Mhz. XTAL output which includes XTAL load capacitance. PCI clock outputs Ground for logic, PLL and output buffers. Power for PCI clock outputs Frequency multiplier select pins. See table above. These inputs have internal pull up devices. Power for SCSI clock outputs SCSI clock outputs Frequency multiplier select pins. See table next page. These inputs have internal pull up devices REF is a buffered copy of the crystal oscillator or reference input clock, nominally 14.31818 MHz.
3 5,6,9,10,13,14,20,23,24 4,7,11,19,22,25 8,12,21 15,16,17 29 28,27,26 31,30,18 32
X2 PCI(0:8) GND VDD3 FS(0:2)A VDD2 SCSI (0:2) FS(0:2)B REF0
OUT OUT PWR PWR IN PWR OUT IN OUT
Note: X1, X2 contain iternal 18pF crystal load cap. Intended to have external load caps of 15 to 18pF required for nominal crystal of 17 to 18pF crystal total load.
2
ICS9169A-70
VDD = 3.310%, TA = 0 to 70C Crystal = 14.31818MHz SCSI outputs: SCSI(0:2) (Assume divide by 2 from VCO)
FS2B 0 0 0 0 1 1 1 1 FS1B 0 0 1 1 0 0 1 1 FS0B 0 1 0 1 0 1 0 1 Target MHz 24 48 10 20 40 50 60 80 Actual MHz 24 48.07 10.02 20.05 40.09 50.11 60.14 80.18 REF MHz 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318
PCI outputs: PCI (0:8) (Assume divide by 2 from VCO)
FS2A 0 0 0 0 1 1 1 1 FS1A 0 0 1 1 0 0 1 1 FS0A 0 1 0 1 0 1 0 1 Target MHz Tristate REF/2 30 33.3 50 55 60 66.6 Actual REF MHz MHz Tristate Tristate REF/2 REF 30.07 14.318 33.27 14.318 50.11 14.318 54.89 14.318 60.14 14.318 66.63 14.318
Note: When FS(0:2)A is 000 or 001, the Tristate and Test modes applies to all outputs for REF, PCI, and SCSI outputs.
FS2A 0 0
FS1A 0 0
FS0A 0 1
PCI Tristate REF/21
SCSI Tristate REF/21
REF Tristate REF1
Note: 1. In Test mode, each PLL is bypassed. The clock signal at X1 (externally driven clock or the crystal) is applied to the divider circuits.
3
ICS9169A-70
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5 V to VDD +0.5 V Ambient Operating Temperature . . . . . . . . . . . . 0C to +70C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-10% (unless otherwise stated) PARAMETER SYMBOL CONDITIONS Input High Voltage VIH Input Low Voltage VIL VIN = VDD Input High Current IIH1 VIN = 0 V Input Low Current IIL1 CL = 0 pF; Select @ 66M Supply Current IDD Input frequency Fi VDD = 3.3 V; Input Capacitance1 Transition Time1 Settling Time
1 1
MIN 2.0 -5 -20
TYP 0.2 -50.0 50 14.318 36.0 0.136 63.0 1.7
MAX 0.9 5 110 5 45.0 2.0 600 4.0 3
UNITS V V mA mA mA MHz pF pF mS S MHz mS
CIN CINX Ttrans Ts Tsh TSTAB
Logic Inputs X1 & X2 pins To 1st crossing of target Freq. From 1st crossing to 1% target Freq. From VDD = 3.3 V to 1% target Freq.
27.0
Clock Overshoot Clk Stabilization1
1
Guarenteed by design, not 100% tested in production.
Electrical Characteristics - REF
TA = 0 - 70C; VDD = VDDL = 3.3 V +/-10%; CL = 20 pF (unless otherwise stated) PARAMETER Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Jitter
1
SYMBOL VOH1 VOL1 IOH1 IOL1 tr5 tf5
1 1 1 1
CONDITIONS IOH = -14 mA IOL = 11 mA VOH = 2.0 V VOL = 0.8 V VOL = 0.8 V, VOH = 2.4 V VOH = 2.4 V, VOL = 0.8 V VT = 1.5 V VT = 1.5 V VT = 1.5 V
MIN 2.4
20.0
TYP 2.9 0.3 -43.0 31.0 0.7 0.6
MAX UNITS V 0.4 V 23.0 mA mA 1.5 1.5 60 400 700 nS nS % pS pS
dt5
40 -700
53 182 -
tj1s5 tjabs5 1
Guarenteed by design, not 100% tested in production.
4
ICS9169A-70
Electrical Characteristics - SCSI
TA = 0 - 70C; VDD = VDDL = 3.3 V +/-10%; CL = 20 pF (unless otherwise stated) PARAMETER Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Skew (window) Jitter SYMBOL VOH1 VOL1 IOH1 IOL1 tr5 tf5
1 1 1 1 1 1 1 1
CONDITIONS IOH = -14 mA IOL = 11 mA VOH = 2.0 V VOL = 0.8 V VOL = 0.8 V, VOH = 2.4 V VOH = 2.4 V, VOL = 0.8 V VT = 1.5 V VT = 1.4 V VT = 1.5 V; Rs= 33; (10 to 24 MHz Clocks) VT = 1.5 V; Rs= 33; (40 to 80 MHz Clocks) VT = 1.5 V; Rs= 33; (10 to 24 MHz Clocks) VT = 1.5 V; Rs= 33; (40 to 80 MHz Clocks)
MIN 2.4
20.0
TYP 2.9 0.3 -43.0 31.0 0.7 0.6
MAX UNITS V 0.4 V 23.0 mA mA 1.5 1.5 55 250 300 150 700 400 pS nS nS % pS pS pS
dt5
45 -250 -700 -400
50 200 90 -
tsk1
tj1s5 tj1s5
tjabs5 tjabs5
1
Guarenteed by design, not 100% tested in production.
Electrical Characteristics - PCI
TA = 0 - 70C; VDD = 3.3 V +/-10%; CL = 30 pF (unless otherwise stated) PARAMETER Output High Voltage Output Low Voltage Output High Current Output Low Current Rise Time Fall Time Duty Cycle Skew (window) Jitter
1
SYMBOL VOH1 VOL1 IOH1 IOL1 tr1 tf1
1 1 1 1 1 1
CONDITIONS IOH = -14 mA IOL = 11 mA VOH = 2.0 V VOL = 0.8 V VOL = 0.8 V, VOH = 2.4 V VOH = 2.4 V, VOL = 0.8 V VT = 1.4 V VT = 1.4 V VT = 1.5 V; Rs= 33 VT = 1.5 V; Rs= 33
MIN 2.4
20.0
TYP 2.9 0.3 -43.0 31.0 0.8 0.9
MAX UNITS V 0.4 V 23.0 mA mA 1.5 1.5 55.0 250 150 300 nS nS % pS pS pS
dt1
45.0 -250
51.0 88
tsk1
tj1s1
tjabs1
-300
Guarenteed by design, not 100% tested in production.
5
ICS9169A-70
General Layout Precautions: 1) Use a ground plane on the top layer of the PCB in all areas not used by traces. 2) Make all power traces and vias as wide as possible to lower inductance.
Notes: 1 All clock outputs should have series terminating resistor. Not shown in all places to improve readibility of diagram 2 Optional EMI capacitor should be used on all CPU, SDRAM, and PCI outputs. 3 Optional crystal load capacitors are recommended.
Capacitor Values: C1, C2 : Crystal load values determined by user All unmarked capacitors are 0.01F ceramic
6
ICS9169A-70
SOIC Package
LEAD COUNT DIMENSONL
32L .804
Ordering Information
ICS9169AM-70
Example:
ICS XXXX M - PPP
Pattern Number (2 or 3 digit number for parts with ROM code patterns) Package Type M=SOIC Device Type (consists of 3 or 4 digit numbers) Prefix ICS, AV = Standard Device
7
ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.

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